The 6th "One Student One Chip" Program Home Page
- Time: Every Saturday 15:00~17:00 China Standard Time
Learning Objectives
"One Student One Chip" will develop your general skills. At the end of the course, you will have a better understanding of the following questions:
- how processors are designed?
- how programs run on computers?
- how to optimize the performance of a processor?
- how to use/design the right tools for efficient debugging?
- how to write your own test cases for unit testing?
- how does an RTL design generate a flowable layout?
We will guide you to design a RISC-V pipeline processor. Run an operating system on your processor. Run a real game on the OS. The processor that achieves the target will be connected to the SoC and will be given the opportunity to tapeout.
Learning Resource
- Icons can be clicked to jump to the appropriate resource
- Complete handouts can be viewed via the navigation bar at the top right of the page
- The content of the Stage S handout is still available 🕊
C = C language (program/simulator/system software) | R = RISC-V instruction set | P = processor design | T = tools
| Stage | ID | Task | Handouts | Slides | Recording | C | R | P | T |
|---|---|---|---|---|---|---|---|---|---|
| Preliminary stage | How to ask questions scientifically | 📚 | 📰 | 🎬 | |||||
| Linux system installation and basic usage | 📚 | 📰 | 🎬 | ||||||
| State machine models of computer systems | - | 📰 | 🎬 | ||||||
| Reviewing the C language | 📚 | 📰 | 🎬 | ||||||
| Program execution and simulators | - | 📰 | 🎬 | ||||||
| Build a verilator simulation environment | 📚 | - | - | ||||||
| Basic Digital Circuit Experiment | 📚 | 📰 | 🎬 | ||||||
| Complet PA1 | 📚 | 📰 | 🎬 | ||||||
| Application for admission defense | |||||||||
| Basic Stage | NEMU with RV32IM support | 📚 | 📰 | 🎬 | |||||
| Machine-level representation of programs (part 1) | - | 📰 | 🎬 | ||||||
| Machine-level representation of programs (part 2) | - | 📰 | 🎬 | ||||||
| Simplest processor implementation with RTL | 📚 | - | - | ||||||
| AM Runtime Environment | 📚 | 📰 | 🎬 | ||||||
| Tools and infrastructure | - | 📰 | 🎬 | ||||||
| Single-cycle NPC with RV32E support | 📚 | 📰 | 🎬 | ||||||
| ELF files and linking | - | 📰 | 🎬 | ||||||
| Devices and inputs/outputs | 📚 | 📰 | 🎬 | ||||||
| Debug tips | - | 📰 | 🎬 | ||||||
| Exception handling and RT-Thread | 📚 | 📰 | 🎬 | ||||||
| Bus | 📚 | 📰 | 🎬 | ||||||
| SoC computer systems (part 1) | 📚 | 📰 | 🎬 | ||||||
| SoC computer systems (part 2) | 📚 | 📰 | 🎬 | ||||||
| Performance and Simple Caching | 📚 | ||||||||
| Pipeline | 📚 | ||||||||
| Accomplish stage B tapeout | |||||||||
| Advanced Stage | under construction | ||||||||
| under construction | |||||||||
| under construction | |||||||||
| under construction | |||||||||
| Accomplish stage A tapeout | |||||||||
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Past Courses Home
Other resources
Record of events
- 2023/08/25 - Open Source Chip Technology Ecology Forum (formerly "One Student One Chip" Technology Forum)
- 2023/07/02 - 6th "One Student One Chip" Kick-Off Meeting
- 2022/11/20 - Chip Open Source and Agile Design from a Software Engineering Perspective(Yungang Bao)
- 2022/08/28 - The First "One Student One Chip" Technical Forum and the Fifth Launching Meeting
- 2022/03/12 - Hardware-software collaboration capabilities in chip design(Yue Jin, Bohan Hu, Zeyu Gao)