Open Source Chip Technology Ecological Forum (formerly "One Student One Chip" Technology Forum)

Forum introduction

The Open Source Chip Technology Ecological Forum (formerly the "One Student One Chip" Technology Forum) will be a concurrent event of the 2023 RISC-V China Summitopen in new window. It will be held all day at Shangri-La Hotel, Beijing, on August 25, 2023. An online live broadcast will also be launched (link to be determined).

The forum focuses on the open source chip technology ecosystem (using open source EDA and open source IP to design open source chips), covers topics such as open instruction set (RISC-V) and its software and hardware systems, open source chip design, open source EDA tool chain, open source IP, chip talent training, etc. It aims to provide a communication platform for relevant enthusiasts to share technical tools, learning experiences and thoughts around open source chips. At the same time, a special session for students will be set up to encourage students to carry out relevant work and share around RISC-V. The forum plans to set up long report, short report, poster and other report types. Everyone is welcome to actively contribute. At the same time, a special session for students will be set up to encourage students to carry out relevant work and share around RISC-V. The forum plans to set up long report, short report, poster and other report types. Everyone is welcome to actively contribute.

Forum Agenda

IDSpeakerOrganizationTitleDate
Morning
Yugang BaoInstitute of Computing Technology, Chinese Academy of SciencesForum speech9:00-9:05
Awarding ceremony9:05-9:10
Session1: Keynote report
1Yugang BaoInstitute of Computing Technology, Chinese Academy of SciencesNew Trend in Processor Chip Development: Open Source Chips9:10-9:35
2Wei ChenT-HEADStandards lead, Teaching and Learning Build a RISC-V Education Ecosystem9:35-10:00
3Yongbin YaoESWINA "core" that can be trusted for life - RISC-V Heading towards High-end10:00-10:25
4Uncle Ben (Tianfei Zhang)Run Linux CommunityRISC-V Virtualization Technology Development and Evolution10:25-10:50
Tea Break10:50-11:10
5Pu WangDatenLordOpen Source Hardware and Agile Methods11:10-11:35
6Jiuyang LiuChips Alliance & PLCT LaboratoryChisel5: The Next Generation of RTL Design and Verification Language11:35-12:00
Afternoon
Session2: Open Source EDA
7Zengrong HuangPengCheng LaboratoryiEDA-Tutorial: Introduction and Usage Practice of the Open Source iEDA Platform14:00-15:00
8Simin TaoPengCheng LaboratoryDigital Front-end Timing Evaluation Based on yosys+iSTA15:00-15:15
Session3: One Student One Chip SIG
9Yuyang MiaoInstitute of Computing Technology, Chinese Academy of SciencesOpen source IP Component Library15:15-15:20
10Zilong LiHangzhou Dianzi UniversityOpen source chip data set15:20-15:25
11Zhenwei DuanBeijing Institute of Open Source ChipHigh Performance Architecture Simulator15:25-15:30
12Lu ChenInstitute of Computing Technology, Chinese Academy of SciencesOpen source RTL Emulator15:30-15:35
13Yuyang MiaoInstitute of Computing Technology, Chinese Academy of SciencesInternational Communication and Translation15:35-15:40
Tea Break15:40-16:00
Session4: One Student One Chip Student Sharing
14Yuchi ZhangTaiyuan University of Technology"One Student One Chip" plan: Build the Basic Abilities of Undergraduates and Cultivate Interdisciplinary Talents16:00-16:10
15Yusong YanBeijing 101 middle schoolLearning·Exploration·Innovation: My story with "One Student One Chip"16:10-16:20
16Yuhang ZengEast China University of TechnologyA First Attempt at Simulation-based Design Space Exploration in One Student One Chip16:20-16:30
17Pei MengUniversity of Electronic Science and Technology of ChinaOne Student One Chip Learning Experience: from Avoiding Problems to Facing Them16:30-16:40
18Yongqiang YuanXi'an University of Posts & Telecommunications"One Student One Chip": A Milestone in Personal Growth and Professional Development16:40-16:50
19Rui WangNorth University of ChinaOne Student One Chip learning and sharing16:50-17:00
20Yan PanHarbin Institute of TechnologyScientific Debugging Method for Processor Design in One Student One Chip17:00-17:10
21Li ShiCarnegie Mellon UniversitySimple RISC-V multi-core System Implementation17:10-17:20
Yugang BaoInstitute of Computing Technology, Chinese Academy of SciencesForum Summary17:20-17:25

Call for Reports

Report topic

  1. "One Student One Chip", including but not limited to:
    • Share "One Student One Chip" learning experience; share tools that are conducive to "One Student One Chip" learning.
    • Share technical skills or achievements can include system software, understanding of RISC-V instruction set, processor design, bus design, peripheral design, debugging skills, etc.
  2. Special session of student works
    • Works or achievements surrounding RISC-V software or hardware, including but not limited to simulators, compilers, instruction extensions, FPGA debugging, board design, etc.
  3. Open source EDA and open source IP
    • Share the experience of learning and using open source EDA, such as using open source EDA to simulate and design chips, etc, using tools such as verilator/yosys/iEDA/openRoad/klayout, etc.
    • Share the development and verification of open source IP, such as processor core, SDRAM, SPI, VGA, Ethernet, etc.
  4. Talent training and open education
    • Share experiences and insights around RISC-V and computer system talent cultivation; share solutions or insights around open education or public welfare teaching, including but not limited to MOOC, community learning, university plans, etc.
  5. University research group enrollment and corporate recruitment
    • "One Student One Chip" focuses on cultivating computer software and hardware collaborative design capabilities, and welcomes university research groups and enterprises to submit applications for recruitment, including but not limited to postgraduate studies, direct PhDs, as well as interns, school recruitment, and social recruitment.Exhibition boards will be set up at the forum for unified display.

Solicitation content: title and abstract

The complete ppt needs to be submitted after the manuscript is accepted.

https://www.wenjuan.com/s/26BNZff/open in new window

Important dates

  • Solicitation deadline: August 11, 2023 23:59:59
  • Author acceptance notice: August 14, 2023
  • Final agenda announcement: August 17, 2023
  • Forum convening time: All day on August 25, 2023

Other instructions

The forum accepts online reports, but offline reports will be given priority under the same conditions.

Program Committee

  • Chairman of the Program Committee - Zihao Yu, Institute of Computing Technology, Chinese Academy of Sciences (yuzihao@ict.ac.cn)
  • Members of the Program Committee (sorted by surname pinyin)
    • Yungang Bao , Institute of Computing Technology, Chinese Academy of Sciences
    • Ye Lu, Nankai University
    • Kan Shi, Institute of Computing Technology, Chinese Academy of Sciences
    • Pu Wang, Datan Technology
    • Yongbin Yao, Yi Siwei Computing
    • Chunfeng Yuan, Nanjing University
    • Uncle Ben (Tianfei Zhang), Run Linux Community
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Contributors: Miao Yuyang, myyerrol