31                 20 19   15 14  12 11    7 6    0
+--------------------+-------+------+-------+------+
|        csr         |  rs1  |funct3|  rd   |opcode|
+--------------------+-------+------+-------+------+

+------+------+---------------------------------+
|Number|Name  |Description                      |
+------+------+---------------------------------+
|0x341 |mepc  |Machine exception program counter|
+------+------+---------------------------------+
|0x342 |mcause|Machine trap cause               |
+------+------+---------------------------------+
|...   |...   |...                              |

#include <klib.h>
void handler() {
  uintptr_t mepc;
  asm volatile ("csrr %0, mepc" : "=r"(mepc));
  printf("exception at mepc = %p\n", mepc);
  while (1);
}

int main() {
  asm volatile ("csrw mtvec, %0" : :"r"(handler));
  asm volatile (".word 0"); // illegal instruction
  printf("I am alive!\n");
  while (1);
}

NAME = simple-rv-handler
SRCS = simple-rv-handler.c
include $(AM_HOME)/Makefile

uintptr_t mepc, mcause;
asm volatile ("csrr %0, mepc" : "=r"(mepc));
asm volatile ("csrr %0, mcause" : "=r"(mcause));
printf("exception mcause = %p at mepc = %p\n", mcause, mepc);

qemu-system-riscv64 ... -d int  # 让QEMU输出异常相关的trace

# RTFM了解异常号的含义
 0 - Instruction address misaligned
 1 - Instruction access fault
 2 - Illegal Instruction
 3 - Breakpoint
 4 - Load address misaligned
 5 - Load access fault
 6 - Store/AMO address misaligned
 7 - Store/AMO access fault
 8 - Environment call from U-mode
 9 - Environment call from S-mode
11 - Environment call from M-mode
12 - Instruction page fault
13 - Load page fault
15 - Store/AMO page fault

#include <stdio.h>
int main() {
  printf("Hello World!\n");
  return 0;
}

qemu-riscv64 -d strace,trace:guest_user_syscall a.out

//riscv-pk/machine/mtrap.c
void mcall_trap(uintptr_t* regs, uintptr_t mcause, uintptr_t mepc) {
  write_csr(mepc, mepc + 4);
  uintptr_t n = regs[17], arg0 = regs[10], arg1 = regs[11], retval, ipi_type;
  switch (n) {
    case SBI_CONSOLE_PUTCHAR: retval = mcall_console_putchar(arg0); break;
    case SBI_CONSOLE_GETCHAR: retval = mcall_console_getchar();     break;
    case SBI_SEND_IPI:        ipi_type = IPI_SOFT;                  goto send_ipi;
    case SBI_REMOTE_SFENCE_VMA:
    case SBI_REMOTE_SFENCE_VMA_ASID: ipi_type = IPI_SFENCE_VMA;     goto send_ipi;
    case SBI_REMOTE_FENCE_I:  ipi_type = IPI_FENCE_I;
send_ipi:
      send_ipi_many((uintptr_t*)arg0, ipi_type); retval = 0;        break;
    case SBI_CLEAR_IPI:       retval = mcall_clear_ipi();           break;
    case SBI_SHUTDOWN:        retval = mcall_shutdown();            break;
    case SBI_SET_TIMER:       retval = mcall_set_timer(arg0);       break;
    default:                  retval = -ENOSYS;                     break;
  }
  regs[10] = retval;
}

Even when misaligned loads and stores complete successfully, these accesses might run
extremely slowly depending on the implementation (e.g., when implemented via an
invisible trap). Furthermore, whereas naturally aligned loads and stores are
guaranteed to execute atomically, misaligned loads and stores might not, and hence
require additional synchronization to ensure atomicity.

程序A发生异常 -> 保存A的Context -> 异常处理 -> 恢复B的Context -> 从异常返回