The First "One Student One Chip" Technical Forum and the Fifth Launching Meeting
Introduction to Technology Forum
The first "One Student One Chip" Technology Forum will be held as a concurrent event of the 2022 RISC-V China Summit on the morning of August 28, 2022 at the Institute of Computing Technology, Chinese Academy of Sciences (No. 6, Zhongguancun Academy of Sciences South Road, Haidian District, Beijing) 4 It will be held in the first floor lecture hall, and bilibili online live broadcast will be launched at the same time.
The "One Student One Chip" technology forum takes students as the main body and aims to build an open source chip ecosystem. It covers topics such as open instruction sets, open source chip design, open source EDA tool chains, and open source IP. It aims to build a communication platform for students, focusing on "One Student One Chip" shares technical tools, learning experiences and thoughts.
The Fifth "One Student One Chip" Launching Meeting
- Registration process: https://ysyx.oscc.cc/docs/about/enroll/student.html
- Registration FAQ: https://ysyx.oscc.cc/docs/about/enroll/faq.html
- Course homepage: https://ysyx.oscc.cc/docs/
- Registration consultation meeting: 20:00 on August 28, 2022 Tencent Conference 318-213-328
Recording link)
Agenda (ID | Speaker | Organization | Title | Date |
---|---|---|---|---|
Keynotes | ||||
1 | Yugang Bao | Institute of Computing Technology, Chinese Academy of Science | "One Student One Chip" Initiative | 9:00-9:20 |
2 | Zihao Yu | Institute of Computing Technology, Chinese Academy of Science | The Fifth "One Student One Chip" Launching Meeting | 9:20-9:30 |
Experience Reports | ||||
3 | Ren Wei | Lanzhou University | One Student One Chip Experience | 9:30-9:40 |
4 | Hanzhang Liu | Taiyuan University of Technology | "One Student One Chip" Breaks the Wall of Software and Hardware Dimensions and Expands the Development Direction of Software Profession | 9:40-9:50 |
5 | Xin Xu | Shandong Jiaotong University | The Direction of Common Obsession - "One Student One Chip" | 9:50-10:00 |
6 | Yusong Yan & Yian Huang | Beijing 101 Middle School | One Student One Chip, One Chip Moving Forward - High School Students's Thoughts on Chip Design | 10:00-10:15 |
7 | Haoyuan Feng | Chinese Academy of Sciences University | A One Student One Chip journey of Learning that Grows through Exploration | 10:15-10:25 |
Ask Questions and Interact | 10:25-10:35 | |||
Technical Reports | ||||
8 | Jiuyang Liu | Huazhong University of Science and Technology | Modern RTL design: Taking Chisel as An Example | 10:35-10:55 |
9 | Haojin Tang | Chinese Academy of Sciences University | Processor Design and Optimization Experience Sharing | 10:55-11:10 |
10 | Yangyu Chen | Chongqing University | SoC-Simulator - A Simple and Easy-to-use Software-defined AXI Slave Device Framework | 11:10-11:20 |
11 | Lida Xu | Institute of Microelectronics, Chinese Academy of Sciences | RISC-V Processor Full-process Design Experience Sharing | 11:20-11:30 |
12 | Congrong Ye | Chinese Academy of Sciences University | ByteFloat Mechanism: Convolutional Neural Network Deployment Solution Based on "One Student One Chip" | 11:30-11:40 |
13 | Boyang Han | Hong Kong university | Open Source Ethernet MAC IP Design and Implementation | 11:40-11:50 |
Ask Questions and Interact | 11:50-12:00 | |||
Yugang Bao | Institute of Computing Technology, Chinese Academy of Science | Summary of the First "One Student One Chip" Technology Forum |
Participation requirements
- Those who register to attend the offline conference must strictly abide by the epidemic prevention policy and pay attention to venue discipline.
- All offline participants' communication tools will be adjusted to quiet mode during the meeting.
- Online participants please pay attention to civilized barrage and watch harmoniously
Call for submissions
Deadline for report collection: August 18, 23:59:59
Submission link: Deadline
Shared content may include but is not limited to:
- Sharing of "One Student One Chip" learning experience and skills, can include understanding of system software, RISC-V instruction set, processor design, bus design, peripheral design, debugging skills, etc
- Sharing of tools that are conducive to "One Student One Chip" Learning
- Open source IP design that can be integrated into "One Student One Chip"
- Full-chain learning experience sharing based on open source EDA
- SIG group proposals and progress sharing
- College curriculum planning and introduction around open source chip design
- Sharing of enterprises’ demand for "One Student One Chip" talents or sharing of cutting-edge technologies that can be integrated with "One Student One Chip"
If you have any questions about the report collection, you can contact Zihao Yu (yuzihao@ict.ac.cn)