The NEMU that supports RV32IM

After reviewing C language through PA1, you will be able to implement a RISC-V processor simulator using C language! Implementing this simulator will give you a preliminary understanding of the RISC-V instruction set and processor behavior, preparing you for the next step of implementing a real processor using RTL.

Implement NEMU supporting RV32IM

According to the PA lecture notes, complete PA2 Stage 1 until you see the following prompt box:


This concludes phase 1 of PA2.

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Contributors: Zihao Yu